The Space Research Institute (IWF) of the Austrian Academy of Sciences (OeAW), Austria’s leading non- university research and science institution, is offering a position as a 

Senior Engineer (f/m/x) 

for Electronics design, FPGA development and Testing of Space Electronics 

(full-time, 40h per week) 

The IWF is looking for a talented and experienced candidate interested in developing and testing scientific instrumentation for space missions to join its on-board computing group. The on-board computing group has provided several instrumental contributions to international space missions. Examples are the EBOX&DPU on ESA/CAS’ SMILE, the RDCU on ESA’s PLATO, PICAM on ESA/JAXA’s BepiColombo, ASPOC on NASA’s MMS 

etc. The group is currently developing the data processing unit (DPU) for instruments onboard ESA’s Comet Interceptor and the NEWATHENA mission, and is also involved in the ESA’s ARRAKIHS mission for which the electronic box (EBOX) and the common data processing units (CDPUs) will be developed. The group is looking for a senior engineer to support the development of the DPUs hardware (schematics) and firmware (FPGA development), as well as testing (board level tests, functional tests) for these on-going and future projects. 

Your profile:

• Master degree, Doctorate degree or Engineering diploma in electrical, computer science or aerospace engineering, with an interest in space instrumentation. 
• Experience in developing FPGA firmware, preferred for space applications including the knowledge of relevant standards 
• Knowledge of the VHDL hardware description language, verification methodology and implementation steps 
• Experience in using laboratory equipment for testing electronics, and functional verification of the units. 
• Knowledge of programming languages such as C, C++ or Python, particularly for developing board level test execution applications. 
• Proficiency in English. 

Your tasks: 

• Define the requirement specification, perform the design, implementation & testing of the logic, conduct routing simulation to ensure timing constraints, and compile validation report of the firmware application developed by the research group. 
• Support the design process and schematics definition for electronics boards. 
• Perform unit level testing (e.g., board level testing of DPUs) and compile the respective test reports. 
• Support test campaigns (e.g., electromagnetic compatibility of EBOX) of sub-system and units. 

The appointment begins as early as March 1st, 2025 for initially 6 years, with the option for a permanent position afterwards. We offer an annual gross salary of € 60.830,56, according to the collective agreement of the Austrian Academy of Sciences (grade N5/1). Depending on qualification and experience, the salary can be negotiated (up to N5/2). 

Applications must include a cover letter in addition to (1) curriculum vitae, (2) cover/motivation letter and (3) certificates for full academic record. Please send the application as one PDF file (Job ID: IWF196TEC124) to elvira.tschachler@oeaw.ac.at no later than January 31, 2025. Inquiries about the position should be directed to Gabriel Giono. 

The Austrian Academy of Sciences (OeAW) pursues a non-discriminatory employment policy and values equal opportunities, as well as diversity. Individuals from underrepresented groups are particularly encouraged to apply.